1。Introduction .................................................................................................................................................................... 2 2.emi优化的设计....................................................................................................................................................................................................................................................................................... 2 2.1。CA-IS3115AW General Description ....................................................................................................................................... 2 2.2.EMI Filter and Component Placement .................................................................................................................................. 3 2.2.1.Decoupling Capacitor Placement ......................................................................................................................3 2.2.2.Y-capacitor ........................................................................................................................................................4 2.2.3.Ferrite Bead/Common-mode Inductor/Differential-mode Inductor ................................................................4 2.2.4.Building the edge guarding ...............................................................................................................................5 3.CA-IS3115AW Reference Designs ................................................................................................................................... 6 3.1.CA-IS3115AW Reference Design Schematic (2-layer PCB) ................................................................................8 3.2.3.Reference Design Overview .................................................................................................................................................. 6 3.2.2-layer PCB with CM-choke on Board ................................................................................................................................... 6 3.2.1.PCB Layout Procedure .......................................................................................................................................6 3.2.2.Reference Design Test Result for the 2-layer PCB .............................................................................................8 3.3.4-Layer PCB with CM-choke on Board ................................................................................................................................. 10 3.3.1.PCB Layout Procedure .....................................................................................................................................10 3.3.2.CA-IS3115AW Reference Design Schematic(4-layer PCB) ...............................................................................12 3.3.3.Reference Design Test Result for the 4-layer PCB ...........................................................................................12 3.4.4-Layer PCB without CM-choke on Board ........................................................................................................................... 14 3.4.1.PCB Layout Procedure .....................................................................................................................................14 3.4.2.CA-IS3115AW Reference Design Schematic (4-layer PCB) ..............................................................................16 3.4.3.Reference Design Test Result for the 4-layer PCB ...........................................................................................16 4.Revision History ............................................................................................................................................................ 18 5.Important Statement .................................................................................................................................................... 18