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1实体问题是2端口（Clk：在std_logic中; 3重置：在std_logic中; 4启用：在std_logic中; 5 Up_down：在std_logic中; 6计数：输出std_logic_vector（3 downto 0））; 7结束问题; 8 9问题的架构a是10信号sCount：std_logic_vector（3 downto 0））; 11信号a，b：std_logic; 12开始13过程（...）14开始15如果Reset =‘1'则16 sCount <=“0000”; 17 a <=‘0'; 18 elsif clk'event and clk = ‘1' then 19 if Enable = ‘1' then 20 if Up_down = ‘1' then 21 if sCount = “1001” then 22 sCount <= “0000”; 23 a <='1'; 24 else 25 sCount <= sCount + '1'; 26 a <='0'; 27 end if; 28 else 29 if sCount = “0000” then 30 sCount = “1001”; 31 a <='1'; 32 else 33 sCount = sCount – ‘1'; 34 a <='0'; 35 end if; 36 end if; 37 end if; 38 end process; 39 40 Count <= sCount; 41 42 过程（…） 43 开始 44 如果 sCount = “0111” 则 45 b <='1'; 46 否则 47 b <='0'; 48 结束如果; 49 结束过程; 50 51 结束 a;
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